1. Field
This disclosure relates generally to non-volatile memories (NVMs), and more specifically, to NVM systems with error correction code (ECC).
2. Related Art
Non-volatile memories (NVMs) generally require special operations for program and erase and there is a limit to how many times these operations can be performed. Whereas in a common memory type, flash, the memory is erased in blocks, it is programmed in segments. Although more than one segment may be programmed at the same time, the portion being programmed is less than a whole block. Nonetheless, there can still be bits that required significantly more programming pulses than the vast majority of other bits. These bits that are slow to program may be referenced as a slow to program bit. Another issue is that over time and perhaps tens of thousands of cycles, some memory cells may become weak or slow to program. These latent weak memory cells are very difficult to detect until they actually become weak or slow to program. Thus, it is not uncommon for them to occur well after the device has been placed in a product which may cause product failure. Product failure is very desirable to avoid under any circumstances but especially failure of an integrated circuit. This is not generally something that the user of the product can repair, but the product must be returned and someone with special training and expensive equipment must do the repair assuming the repair is even worth doing in light of the cost of repair relative to the cost of the product.
Accordingly, there is a need for NVM systems to improve upon one or more of the issues raised above.